ultraembedded

Joined Jun 2014 1,546 followers View on GitHub

Stars: 7,804; across 54 public repos
Rank: #4,367; of 323,846 users, top 2%; Down 303 places this week

Repositories with 50+ stars

ultraembedded's repositories with their overall rank
Rank	Repository	Language	Stars
37,533	riscv RISC-V CPU Core (RV32IM)	Verilog	1,821
51,316	biriscv 32-bit Superscalar RISC-V CPU	Verilog	1,331
70,034	cores Various HDL (Verilog) IP Cores	Verilog	942
98,887	core_ddr3_controller A DDR3 memory controller in Verilog for various FPGAs	Verilog	649
192,693	FPGAmp 720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)	C	307
205,903	core_jpeg High throughput JPEG decoder in Verilog for FPGA	Verilog	284
262,049	riscv_soc Basic RISC-V Test SoC	Verilog	213
304,015	openlogicbit Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.	Verilog	178
436,793	exactstep Instruction set simulator for RISC-V, MIPS and ARM-v6m	C++	114
439,941	libhelix-mp3 Fixed-point MP3 decoder (RISC-V port)	C	113
449,451	core_sdram_axi4 SDRAM controller with AXI4 interface	C++	110
469,582	core_ft60x_axi FTDI FT600 SuperSpeed USB3.0 to AXI bus master	C++	104
473,251	core_usb_host Basic USB 1.1 Host Controller for small FPGAs	C	103
480,761	core_audio Audio controller (I2S, SPDIF, DAC)	Verilog	101
503,963	core_usb_cdc Basic USB-CDC device core (Verilog)	Verilog	95
540,159	core_dvi_framebuffer Minimal DVI / HDMI Framebuffer	Verilog	87
583,138	fat_io_lib Small footprint, low dependency, C code implementation of a FAT16 & FAT32 driver.	C	79
588,876	core_dbg_bridge UART -> AXI Bridge	Verilog	78
626,819	core_soc Basic Peripheral SoC (SPI, GPIO, Timer, UART)	Verilog	72
655,643	core_uriscv Another tiny RISC-V implementation	Verilog	68
723,122	usb_sniffer High Speed USB 2.0 capture device based on miniSpartan6+	C	60
723,122	usb2sniffer USB2Sniffer: High Speed USB 2.0 capture (for LambdaConcept USB2Sniffer hardware)	Verilog	60
742,438	core_axi_cache 128KB AXI cache (32-bit in, 256-bit out)	Verilog	58
752,797	riscv-linux-boot Trivial RISC-V Linux binary bootloader	C	57
809,307	core_spiflash SPI-Flash XIP Interface (Verilog)	Verilog	52

Among 323,846 users

6.3k–10k stars: 2,566 users, including ultraembedded

top 50%top 10%top 1%top 0.1%

Stars along the bottom, and users in each band on a log scale

Where the stars are

Languages

Verilog 6.1k stars, 78% · 16 repos
C 719 stars, 9% · 6 repos
C++ 328 stars, 4% · 3 repos

When they were made

25 repos with 50+ stars, made between 2014 and 2021

101001k10k coresbiriscvriscv

Quick stats

Next rank: +3 stars to reach #4,365
Next milestone: +2,125 stars to reach the top 1%
Public repos: 54, 25 with 50+ stars
Popular repos: 14 over 100 stars, 2 over 1k stars
Top repo: riscv, #37,533 of all repos, 23% of stars
Smaller repos: 668 stars from repos under 50