chipsalliance/ VeeRwolf
FuseSoC-based SoC for VeeR EH1 and EL2
by CHIPS Alliance Verilog 76 forks Created Aug 2019 View on GitHub
- Stars
- 342
- 2% of chipsalliance's stars
- Rank
- #176,065
- of 852,369 repos, top 21%
Among 852,369 repos
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Quick stats
- Next rank
- +1 star to reach #175,645
- Next milestone
- +13 stars to reach the top 20%
- Popular
- One of 490,939 repos with 100+ stars
- Yearly average
- 47 stars a year since Aug 2019