spcl

Official Implementation of "Graph of Thoughts: Solving Elaborate Problems with Large Language Models"

DaCe - Data Centric Parallel Programming

Code for Neurips24 paper: QuaRot, an end-to-end 4-bit inference of large language models.

Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.

Python interface for MLIR - the Multi-Level Intermediate Representation

Official Implementation of "Multi-Head RAG: Solving Multi-Aspect Problems with LLMs"

Official Implementation of "Affordable AI Assistants with Knowledge Graph of Thoughts"

Neural Code Comprehension: A Learnable Representation of Code Semantics

Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".

SeBS: serverless benchmarking suite for automatic performance analysis of FaaS platforms.

Official Implementation of "Psychologically Enhanced AI Agents"

Research and development for optimizing transformers

PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing

ATLAHS: An Application-centric Network Simulator Toolchain for AI, HPC, and Distributed Storage

Official Implementation of "Reasoning Language Models: A Blueprint"

A toolchain for rapid design space exploration of chiplet architectures

NPBench - A Benchmarking Suite for High-Performance NumPy

Deep Learning for Post-Processing Ensemble Weather Forecasts

A Data-Centric Compiler for Machine Learning

development repository for the open earth compiler

BLAS implementation for Intel FPGA

Accelerating DNN Convolutional Layers with Micro-batches

rFaaS: a high-performance FaaS platform with RDMA acceleration for low-latency invocations.