hrvach/
FPGA implementation of DEC PDP-1 computer (1959) in Verilog, with CRT, Teletype and Console.
by Hrvoje Čavrak Verilog MIT licence 18 forks Created Dec 2018 View on GitHub
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- 195
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- #282,913
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- One of 490,852 repos with 100+ stars
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- 25 stars a year since Dec 2018